VHDL implementation of the RRISC CPU

A small CPU with a radically reduced instruction set. Hand-crafted. Implemented in VHDL, for use in an FPGA.

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This is where it will run: on my Xilinx Spartan-7 FPGA board “Arty S7”:


The FPGA will contain:

Going independent

As the Spartan-7 is far too under-utilized with just the RRISC CPU and RAM, I am contemplating putting a MicroBlaze CPU on there as well, running an microsd card boot loader. This will turn the board into a RRISC development board. Programs can then be run from SD-card, without having to re-program the FPGA.

All it takes, is a little microSD card slot and a bit of code.


^ toc

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