VHDL implementation of the RRISC CPU

A small CPU with a radically reduced instruction set. Hand-crafted. Implemented in VHDL, for use in an FPGA.

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Vim, tmux, ghdl & gtkwave workflow

Via ssh. On a Chromebook :)

It’s super smooth, editing VHDL in vim (neovim), running ghdl in a separate tmux pane via vim-tmux, and using gtkwave to view the waveforms of the simulation. Textual simulation output and logging can be viewed as ghdl’s output. I prefer this super quick 1-keystroke way of running my testbenches, compared to the sluggish Vivado GUI workflow.

As an extra plus, vim and commandline work smoothly over ssh. With X-forwarding enabled, gtkwave works via ssh, too.

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While all that software runs in the Linux container of my Chromebook, too, I got used to the habit of SSH-ing into my stationary Linux box, making it my main devlopment machine. So when I’m not at my desk, I use my Chromebook to attach to the tmux session of the PC and seemlessly continue work there.


^ toc

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> The FPGA