VHDL implementation of the RRISC CPU

A small CPU with a radically reduced instruction set. Hand-crafted. Implemented in VHDL, for use in an FPGA.

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What’s unique about RRISC:

Example of using the port-mapped ALU to add two values:

     lda #value1          ; first value to add
     out a, ALU_OPERAND1  ; --> into ALU register
     lda #value2          ; second value to add
     out a, ALU_OPERAND2  ; --> into ALU
     lda #ALU_ADD         ; add command
     out a, ALU_CMD       ; --> into ALU
     in a, ALU_RESULT     ; read result

^ toc

< Radical RISC from the early nineties

> It’s executing its first instruction